1. Field of the Invention
The present invention relates to an insulated gate bipolar transistor (herein called "IGBT") for use as a power switching element and to a process of producing the same.
2. Discussion of the Related Art
Current applications increasingly use IGBTs as power switching elements. In such applications, an IGBT is typically formed, for example, by adding a p.sup.+ layer to the drain electrode side of a drain region in an n-channel vertical type MOSFET. Specifically, as shown in the cell depicted in FIG. 2, the process of forming the cell comprises the steps of epitaxially forming a low-resistance n.sup.+ layer 2 on one side of a p.sup.+ silicon substrate 1, laying a high-resistance n.sup.- layer 3 on the surface of the n.sup.+ layer 2, selectively forming a p.sup.+ layer 4 in a surface portion of the n.sup.- layer 3, selectively forming an n.sup.+ layer 5 in a surface portion of p.sup.+ layer 4, forming a gate electrode 7 and connecting it to a gate terminal G, gate electrode 7 being formed over a gate insulating film 6 on a surface region 41 of p.sup.+ layer 4 which acts as a channel region, surface region 41 being disposed between n.sup.- layer 3 and n.sup.+ layer 5, forming a source electrode 8 over an insulating film 10, source electrode 8 being connected to a source terminal S and formed in common contact with p.sup.+ layer 4 and n.sup.+ layer 5, and further disposing a drain electrode 9 on the other side of p.sup.+ substrate 1, drain electrode 9 being connected to a drain terminal D.
When a positive voltage is applied to gate terminal G and drain terminal D while source terminal S is grounded, the MOSFET constituted by n.sup.+ layer 2, n.sup.- layer 3, p.sup.+ layer 4, n.sup.+ layer 5, gate electrode 7, source electrode 8 and the like is turned ON and electrons flow into n.sup.- layer 3 through the channel region 41. A corresponding hole injection in response to the influx of electrons into n.sup.- layer 3 is induced from p.sup.+ substrate 1 through n.sup.+ layer 2. Conductivity modulation, thus, occurs in n.sup.- layer 3 and the localized resistance decreases, thus developing a low resistance "ON" characteristic.
Recently, applications have arisen which require an IGBT with decreased turn-OFF losses for use at high operating frequencies. Attempts have been made to shorten turn-OFF lifetime and thereby reduce turn-OFF losses by introducing a lifetime killer. However, the benefits of introducing a lifetime killer are not without corresponding drawbacks. For example, one tradeoff characteristic which arises from the introduction of a lifetime killer is an increase in the ON-state voltage of the switching element. This and other tradeoff characteristics largely depend on the thickness of the n.sup.- layer 3. IGBT shown in FIG. 2 is often referred to as a punch-through type since n.sup.+ layer 2 is used as a buffer layer which acts as a depletion layer stopper. Thus, in a conventional punch-through IGBT, the thickness of n.sup.- layer 3 is reduced to improve the tradeoff characteristics.
Conventional IGBTs are costly to manufacture because an epitaxial wafer must be employed. If a relatively inexpensive wafer is employed, such as one prepared from a silicon monocrystal under the FZ (Floating zone) process the reduction of wafer thickness is limited because of difficulties in handling thin wafers during the manufacturing process.
In the FZ method, a high-purity polycrystalline rod with a seed crystal at the bottom is held in a vertical position and rotated. The rod is enclosed in a quartz envelope within which an inert atmosphere (argon) is maintained. During the operation, a small zone (a few centimeters in length) of the crystal is kept molten by a radio-frequency heater, which is moved upward from the seed so that the molten zone (floating zone) traverses the length of the rod. The molten silicon is retained by the surface tension between the melting and growing solid silicon faces. As the floating zone moves upward, a single crystal silicon freezes at the zone's retreating end and grows as an extension of the seed crystal.
Consequently, it has not been feasible to simultaneously lower ON-state voltage and reduce turn-OFF loss in a switching element fabricated from non-epitaxal wafer.